SupportApplicationEngineer-AssociateConversionSeongnam,Gyeonggi-do, Korea,Republic ofJobDescriptionJob IDCompanyOrganization459774SiemensElectronicDesignAutomation (Korea)Digital IndustriesLLCJob FamilyCustomer ServicesExperience LevelFull Time / Part TimeContractTypeEarlyProfessionalFull-timePermanentSiemens EDAis aglobaltechnology leader in ElectronicDesign Automationsoftware.Our software tools erable companies arondtheworldtodevelophighlyinnovative electronicproducts faster andmore cost-effectively.Ourcustomersuseour tools to pushtheboundariesoftechnologyand physics to deliveer betterproducts in theincreasinglycomplex worldof chip,board,andsystemdesign.KeyResponsibilities:Providetechnical supporttocustomers viatelephoneandotherelectronic means,andat customer locationsAssistcustomersindeployingSiemensEDA'sQuestato solvedesignchallengesTrackandupdate customerissuesusingdefinedSiemens EDA's processesandtrackingtoolsDevelopanddelivertechnicaltrainingon new features andproductupdatesDeveloptechnicalcontent forSiemensEDA'sknowledge baseCommunicate customerstechnical requirementsas wellascustomerissuestothe product and salesteamsWork collaborativelywithteammembers toensuremutualsuccessQualifications:More than1 year experiencesrelatedwithregister-transfer-level(RTL)digitallogic design,functional verificationmethodology,static verification, andFPGA &emulation aplusBachelor'sdegree inEE andrelatedfieldrequiredStrongwrittenandoralcommunicationsin theEnglishlanguage is a plusBuildstrongrapport andcredibilitywithcustomer organizatiors whilemaintaininga companyinternalnetworkof contactsWith strongcommunicationsandinterpersonal skillsThis experience shouldincludesomeof thefollowings:Job ExperienceRequirementVerificationof FullSoCandIP level: VerilogRTLsimulationismust,Validation of IPon FPGAplatform is a plusFamiliar with SystemVerilog,UVM is mustSOC work&verification withARM Cores,protocolslikeAXI,ACE,APB... a plusFamiliar with mobileAP,memoryspec.likeDDR,LPDDR is aplusToolExperienceDesignandSimulation inRTL:Verilog-HDL,NC-Verilog,Xcelium,Questa, VCSRTLDebugger:DVE,Verdi,SimvisionLogic SynthesisDC Complier is aplusPower verification : PowerPro,Spyglass,UPFflowverificationisaplusDesirableQualificationsSystemVerilog,OVM/UVM,SVASystemC,C/C++,Tcl/TK,PERLas a plusSynthesis,CDC andStatic timing analysis as aplusWe are an equalopportunityemployerandvaluediversity at our company.We do notdiscriminate onthebasis of race,religion,color,nationalorigin, sex,gender,genderexpression,sexualorientation,age,maritalstatus,veteranstatus,or disability status.We are SiemensAcollectionofover377,000minds buildingthe future,one day at atimeinover200courtries.We'rededicated to equality,and we welcome applcations thatreflect thediversityof the communitieswework in.Allemploymentdecisions at Siemens are basedonqualifications,merit,andbusiness need.Bring your curiosityand creativityand helpus shapetomorrow!We offer a comprehnsive rewardpackagewhichincludesacompetitivebsic salarygenerous holidayallowance,pension,and private healthcare.Siemens Software.Where todaymeets tomorrow.#LI-EDA#LI-Hybrid
